The design of a 2.45 GHz low-power low-noise amplifier
In this paper, a low noise amplifier (LNA) with a newly architecture of fully integrated common-source is designed based on TSMC 0.35 urn CMOS process, which worked at the frequency of 2.45 GHz. For input matching, LC parallel network is used instead of the traditional large inductor, and a capacitor is paralleled on the gate. Simulation results with LNA design shows that the newly architecture can conducive to the input matching and can reduce noise and power.
low noise 2.45 GHz input matching
Qian Yi Zhu Xiao-rong
Department of Information Science and Technology Taishan University Taian, China
国际会议
哈尔滨
英文
670-673
2011-12-24(万方平台首次上网日期,不代表论文的发表时间)