AN OPTIMIZED PIPELINE FFT PROCESSOR BASED ON FPGA

摘要：

How to design and optimize a pipeline FFT Processor based on FPGA is presented.The architecture of FFT core is based on a new approach 1 using pipeline technique to increase the performance of the design.Following that, Radix-22 algorithm is chosen to implement the FFT processor.Some necessary techniques are mentioned.This is just the straightforward adjustment; however it improves the frequency, performance and saves resources considerably for the design.

关键词： FFT FPGA Radix-22 SDF Pipelining architecture optimization

作者: NGO THANH NHAN VU DUC LUNG TRAN CONG DANH NGUYEN THE DAI DUONG

作者单位: Integrated Circuit Design and Education Center (ICDREC) - Vietnam National University - Ho Chi Minh University of Information Technology,Vietnam National University Ho Chi Minh City

会议类型: 国际会议

会议名称: 2011 3rd International Conference on Computer Technology and Development(2011第三届计算机技术与发展国际会议 ICCTD2011)

会议地点: 成都

会议语种:英文

页码: 593-597

在线出版日期: 2011-11-25（万方平台首次上网日期，不代表论文的发表时间）