FPGA Implementation of Wireless Communication System
A high data reliability for high-speed transmission of LDPC-OFDM wireless communication system architecture is proposed with the implementation plan by the field programmable gate array (FPGA) .Using the orthogonal properties of OFDM sub-channels can be transmitted over a combination of coding and decoding LDPC codes in the high performance, will achieve good results in communication system. The LDPC-OFDM system is implemented by the second generation of Altera corporation with the EP2C35 device Cyclone II. The FPGA implementation results show that, the data transmission performance is good and the data throughput is wide and the decoder can achieve a maximum decoding throughput of 10Mb/s at 15 iterations, it can meet the high-speed wireless communication system.
Low-density parity-check (LDPQ codes Orthogonal Frequency Division Multiplexing (OFDM) field programmable gate array(FPGA) implementation intellectual property core
Zhongxun wang Dong guo Xingcheng wang Xinqiao yu
Institute of Science and Technology of Yantai University 264005, Yantai City, China Institute of Science and Technology of 1 Yantai University 264005, Yantai City, China
国际会议
重庆
英文
989-992
2011-08-20（万方平台首次上网日期，不代表论文的发表时间）