Design and Implementation of Interleave Encoder based on FPGA
Presents a design method of 192bit per frame interleave encoder, and the ALTERA Cyclone devices EP2C8QC208 FPGA is used to achieve the dseign. Simulation and tseting results show that the interleaver has a small additional delay and high reliability and can be used for anti-burst interference in data communications systems.
communications interleave Implementation Filed Programmable Gate Array
Minjin XIAO
School of Electronic Information & Electric Engineering, Changzhou Institute of Technology CZU Changzhou, China
国际会议
2011 International Conference on Electronics and Optoelectronics(2011电子学与光电子学国际会议 ICEOE 2011)
大连
英文
453-456
2011-07-29(万方平台首次上网日期,不代表论文的发表时间)