A Novel Network Interface of NoC with Pipeline Enhancement
A novel network interface (NT) of networkon-chip (NoC) is proposed in this paper with the goal of optimizing system performance. An attractive feature of our NI design is the ability to support pipeline operations of bus transfer when packets pass through the network. By using more compact packet formats, the pipeline executions of data transfer are realized on the destination node instead of the source node. As a result, the overlap of address and data phases which is fundamental to the pipelined nature of bus architectures of the local system is remained. The benefit of the new method is analyzed theoretically firstly, and then to evaluate the proposed NI with experimental results, we select a 2D-mesh NoC with local systems based on AMBA-AHB protocol as a case study. The results show that the new design can save 73.5％ execution time and reduce 60.0％ network loads in the best case.
Nctwork-on-Chip Network Interface Pipeline
Li Li Jiawen Wang Yuang Zhang Hongbing Pan Rong Zhang
Institute of VLSI Design, Nanjing University LAPEM, Nanjing University Nanjing, Jiangsu 210093, China
国际会议
海口
英文
119-122
2011-07-15（万方平台首次上网日期，不代表论文的发表时间）