A Multirate Double-Sampling Sigma Delta Modulator for Multi-Standard Wireless Radio Receivers
A novel multirate doublesampling sigma delta modulator is proposed for the low power A/D converter for multistandard wireless applications. A cascade 22 structure is designed for the modulator. The multirate technique reduces the sampling rate of the 1st stage integrator to relax the performance requirements of the operational amplifiers(OPAMP), which in turn results in low power consumption. The doublesampling technique is adopted to update the integrator output of the switched capacitor circuit during the both clock phases of the master clock. The sampling frequency is twice of the master clock frequency. The clock frequency can be halved to relax the settling time of the OPAMPs to achieve the similar performance concerning the signal to noise ratio with the conventional sigma delta modulator, which decreases the power dissipation. In comparison with the conventional doublesampling sigma delta modulator topology, the proposed modulator architecture obtains the similar performance with a low slewrate requirement of the 1st stage integrator. The power dissipation is effectively decreased.
sigmadeltamodulator multi-rate double-samplingtechniques multi-standardwirelessreceivers lowpowerelectronics
Cao Shun Li Jinfeng Wei Lifeng
College of information engineeringShenyang university of chemical technologyShenyang, China College of information engineering Shenyang university of chemical technology Shenyang, China
国际会议
广州
英文
1-4
2011-05-13（万方平台首次上网日期，不代表论文的发表时间）