Three-Stage Amplifier with Recycling Folded Cascode Input-Stage and Active-Capacitive Feedback Techniques

摘要：

This paper presents a high-gain wide-bandwidth threestage amplifier, which adopts a recycling folded cascade input-stage, two active-capacitive feedback networks and two feedforward stages. Under low-power conditions, the three-stage amplifier achieves well performance such as the gain-bandwidth product (GWB) and the slew rate (SR). Designed and simulated in a standard 0.5um CMOS process, the three-stage amplifier achieves a dc gain of about 130dB, GWB of 15MHz with 62.5° phase margin and SR+/SR-=10.57/10.41 V/μs using a 3-V power supply and a 25-kΩ//120-pFload.

作者: Qianneng Zhou Min Tan Hongjuan Li Rong Xue Zhe Wang

作者单位: National Labs of Analog Integrated Circuit, Chongqing 400060, China College of Electronic Engineerin National Labs of Analog Integrated Circuit, Chongqing 400060, China College of Computer Science and Technology, Chongqing University of Posts and Telecommunications, Ch College of Electronic Engineering, Chongqing University of Posts and Telecommunications, Chongqing 4

会议类型: 国际会议

会议名称: 2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

会议地点: 厦门

会议语种:英文

页码: 144-147

在线出版日期: 2011-10-25（万方平台首次上网日期，不代表论文的发表时间）