Variation-Resilient Voltage Generation for SRAM Weak Cell Testing
Increasing process spread has made SRAM stability a major concern in SoC integration. Previous approaches to SRAM stability testing focused on the CUT but did not address the impact of variation on testing circuitry itself. . This paper presents a very simple voltage generator scheme that considers controllability and observability of testing circuitry while dealing with process variations. The proposed design can be easily tuned with a bias voltage to combat variations. Experimental results with 0.18um technology show that voltage deviation within the range of ±2% can be achieved, which greatly increases the robustness of testing circuitry against variations.
Chingwei Yeh Yan-Nan Liu Jinn-Shyan Wang Pei-Yao Chang
Department of Electrical Engineering, National Chung-Cheng University, Taiwan
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
276-279
2011-10-25(万方平台首次上网日期,不代表论文的发表时间)