A Study of Dual-Vt Configurations of an 8T SRAM Cell in 45nm

摘要：

Since the dual-threshold voltage assignment is an effective technique to reduce leakage power with negligible area overhead, we evaluate and compare the performance of an 8T SRAM cell in various dominant dual-Vt configurations in this paper, in order to provide the designer with a reasonable trade-off in SNM, leakage power, and delay for further different desired yields. According to simulation results, it is concluded that the configuration C8 has the highest SNM and high Vt Mnl can suppress the leakage current effectively. At last, the write and read delay time in different dual-Vt configurations are analyzed, and the reasons for delay variation are given.

关键词： SRAM 8T SNM delay leakage

作者: Wenbin Liu Jinhui Wang Wuchen Wu Xiaohong Peng Ligang Hou

作者单位: VLSI & System Lab, Beijing University of Technology, Beijingl00124, China

会议类型: 国际会议

会议名称: 2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

会议地点: 厦门

会议语种:英文

页码: 323-326

在线出版日期: 2011-10-25（万方平台首次上网日期，不代表论文的发表时间）