A 90 nm 16 Mb Embedded Phase-Change Memory Macro with Write Current Smoothing and Enhanced Write Bandwidth
This paper presents a 16 Mb embedded phase change memory macro based on a 90 nm 6ML technology. The memory macro consists of two logical banks. The major challenge in ePCM is its low write bandwidth in comparison to its read bandwidth due to high programming currents. This macro achieves a high bandwidth up to 12 MB/s, which is attributed to the write current smoothing and power saving techniques.
Hongwei Hong Zheng Li Qin Li Ruizhe Wang Charlie Hwang
BAMC-BJ Corporation, 12 North Honda Road, Beijing, 100176, China BAMC, 12200 Ford Road Suite 265, Dallas, Texas, 75234, USA
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
343-346
2011-10-25(万方平台首次上网日期,不代表论文的发表时间)