RRA-Based Multi-Objective Optimization to Mitigate the Worst Cases of Placement

摘要：

As VLSI/PCB design keeps going through higher complexity, it is increasingly important to mitigate the worst cases of placement in physical design in order to get an acceptable solution within shorter runtime. This paper mainly focuses on the worst-case mitigation for multi-objective placement by using relay-race algorithm (RRA). Several intuitive advantages of RRA are discussed by comparing with simulated annealing (SA) and genetic algorithm (GA). MCNC and ami49_X benchmarks are used to test the effectiveness of RRA for placement with multiple objectives. Based on the experimental data comparing with SA, RRA obtains near 24％ worst-case improvement for interconnect power consumption on average without any degradation of maximal delay. With respect to area minimization, RRA gets worst-case improvement for all tested benchmarks with near 50％ runtime of SA (2X speedup).

关键词： multi-objective optimization relay-race algorithm CAD technique VLSI/PCB design physical design

作者: Yiqiang Sheng Atsushi Takahashi Shuichi Ueno

作者单位: Department of Communication and Integrated Systems Tokyo Institute of Technology, Tokyo, 152-8852, J Division of Electrical, Electronic and Information Engineering Osaka University, Suita-shi, 565-0871

会议类型: 国际会议

会议名称: 2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

会议地点: 厦门

会议语种:英文

页码: 357-360

在线出版日期: 2011-10-25（万方平台首次上网日期，不代表论文的发表时间）