Robustness and Performance analysis on High Speed ASIC design with canonical statistical timing model

摘要：

This paper discusses the robustness and performance on H tree structure with canonical statistical timing model. We compare the deterministic skew and statistical skew to analyze the design health. With the sensitivity distribution available at the end of statistical timing, we make the robustness diagnostic to reveal key variation sources and optimization scheme. The skews under intra-chip variation are also evaluated to select best H tree structure. statistical timing; H tree; robustness

作者: Suoming Pu Bo Yu Xuan Zou

作者单位: China Design Center, IBM Microelectronics, Beijing 100193, China

会议类型: 国际会议

会议名称: 2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

会议地点: 厦门

会议语种:英文

页码: 429-432

在线出版日期: 2011-10-25（万方平台首次上网日期，不代表论文的发表时间）