CPIPQ: A Common Platform for Silicon IP Qualification
With the increasing complexity of system-on-chip (SoC) design, intellectual property (IP)-based design flow is becoming an inevitable trend to achieve high performance and short time-to-market.. However the transfer of IP core remains a complex and timeconsuming process. Different IP vendors usually use different design rules and tool flows, which make it difficult for IP integrators to select suitable IP cores and integrate them rapidly. In this paper, a common platform for IP qualification (CPIPQ) is presented to provide and establish a set of common standards to qualify Soft/Hard IP. There are two kinds of qualification methods: subjective quality metric and objective quality metric. We use IEEE QIP Metric to evaluate the subjective quality metrics of IP cores. Objective metrics are measured automatically by using commercial EDA tools, as well as tools that developed by ASTRI IC Design Group.
Mark P. C. Mok Kenneth C. K. Lo Yuzhong Jiao Yiu Kei Li
IC Design Group, Hong Kong Applied Science and Technology Research Institute (ASTRI), Hong Kong
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
437-440
2011-10-25（万方平台首次上网日期，不代表论文的发表时间）