A Dual 12bit 80MSPS 3.3V Current-Steering DAC for HINOC
This paper presents a 12bit 80MSPS 3.3V dual channel digital to analog converter (DAC) with a voltage driver with large output swing range lead to a smaller output glitch, operate at higher output voltage lead to process-variation immunity. The HFNOC application requires operating frequency greater than 64MHz and signal bandwidth greater than 16 MHz. Therefore, the DAC operate at 80Msps and the output settling time to 0.1％ is typically 16 ns can meet the specification. The differential nonlinearity (DNL) and integral nonlinearity (INL) are ±1 LSB (Max.) and ±2 LSB (Max.), respectively. The spurious free dynamic range (SFDR) at 80MSPS remains above 65 dB for input frequency up to 10MHz. Total power dissipation is 105mW with 3.3V power supply. The converter was implemented in a 130-nm CMOS technology and the die size is 1.9 mm × 2.1 mm.
HINOC Current-Steering DAC.
Hongming Chen Xiaoyuan Chen Yuhua Cheng
Shanghai Research Institute of Microelectronics (SHRIME), Peking University, China Shanghai Bwave Technology Co., Ltd
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
524-527
2011-10-25（万方平台首次上网日期，不代表论文的发表时间）