A low-power 4.224GS/S Sampler in 0.13-μm CMOS for IR UWB Receiver
This paper presents a low-power 4.224GS/s sampler in 0.13-μm CMOS for IR-UWB receiver. In this design, equivalent sampling technique is introduced to multiply the sampling rate and offset cancellation technique is applied to achieve high resolution. The offset cancellation technique does not require any preamplifier and quiescent current. Moreover, the comparator core in the sampler only requires one phase clock while conventional two phase clocks are needed. The total power of sampler is only 2.4mW with active area of 0.4mm2.
Yi Zhao Jun Jiang Ke Shao Yajie Qin Zhiliang Hong
State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
548-551
2011-10-25(万方平台首次上网日期,不代表论文的发表时间)