An Efficient 90nm Technology-Node GHz Transceiver of On-Chip Global Interconnect
Today high speed signal transmission system for on chip global interconnect requires elaborate design of the transceiver. The design goal of transceiver is to ensure the transmission obtains an improvement in latency and power, which are the two most important factors in high speed transmission. In this paper, we present an efficient structured transceiver which implements low swing technology based on the differential structure with the accurate modeling of the on chip global interconnect. And we give the principals of the structure and compare the optimized simulation results with the traditional inverter insertion method used to decrease the delay of the global interconnect. Our transceiver design is based on the 90nm CMOS technology and TSMC 90nm interconnect structure on Metal 5. The global interconnect length we focus on is the general length 10mm. Compared to repeater insertion, this system has a latency advantage of 17％ and remarkable advantage in power up to 33.9％.
90nm technology Differential transmission Low swing 3-D multi-level modeling
Zaixiao Zheng Zhigang Mao Jianfei Jiang
Department of Microelectronics, Shanghai JiaoTong University, Shanghai 200240. China
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
706-709
2011-10-25（万方平台首次上网日期，不代表论文的发表时间）