Automatic Compilation Flow for a Coarse-grained Reconfigurable rocessor
Reconfigurable processor is widely used in multimedia applications. Its performance depends not only on good hardware design but also on compilers that can quickly create efficient configurations. This paper describes an automatic compilation flow for REmus--a coarse-grained reconfigurable processor. The front-end of the compiler extracts code sections with high parallelism degree from the application and generates corresponding DFGs (data flow graph). The back-end of the compiler maps the DFGs onto the reconfigurable computing array. The suitability of the compiler for the target application domain is illustrated with code samples of MPEG-2. Experimental results indicate that the compilation flow can map the C code onto REmus automatically and 4.49x to 6.23x speedup is achieved in comparison with implementation of general-purpose processor.
coarse-grained reconfigurable DFG compiler
Hao Wang Weiguang Sheng Weifeng He
School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
744-747
2011-10-25(万方平台首次上网日期,不代表论文的发表时间)