Low Power Design for SoC with Power Management Unit
In this paper, motivated by reducing power consumption of system-on-chip (SoC), sets of methods are applied in low power design for SoC, especially power management unit integrated. Corresponding to different applications, different power supply is provided. The whole SoC has been implemented with SMIC 0.13um standard CMOS process, the test results show that the operating frequency is 100MHz and the power consumption is about 96.24 mW.
System-on-chip (SoC) dynamic power consumption power management unit (PMU) DC-DC converter LDO converter
Daying Sun Shen Xu Weifeng Sun Shengli Lu Longxing Shi
National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
776-779
2011-10-25(万方平台首次上网日期,不代表论文的发表时间)