Reflection Analysis of Signal Transmission in 32-bit CPU Based SiP
Signal integrity is an important issue in SiP (System in Package) which has complex interconnection and communication among chips in one package. The researches concerning both reflection and crosstalk are of great significance. This paper focuses on the study of restraining reflection of one transmission line which is the fundamental element of signal quality. The simulation and analysis are based on a SiP which packages four components together, including a 32-bit CPU (Loongson 1B) and three memories (one Flash and two EEPROMs). Through analysis and comparison, a best method of impedance matching to restrain reflection is designed which reduces overshoot by 98.68％ and reduces undershoot by 79.26％, compared with the situation without impedance matching.
System in Package (SiP) Reflection Impedance matching
Zerong Tao Liji Wu Xiangmin Zhang
Tsinghua National Laboratory for Information Science and Technology Institute of Microelectronics of Tsinghua University, Beijing 100084, China
国际会议
2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)
厦门
英文
800-803
2011-10-25（万方平台首次上网日期，不代表论文的发表时间）