会议专题

A Security Processor Based on MIPS 4KE Architecture

This paper presents a security processor based on MIPS 4KE architecture which extends security functions of AES and ECC. Due to the different features of AES and ECC encryptions, two dedicated hardware units are employed. One is the AES function unit which is integrated into the pipeline of this MlPS-like processor, and the other is the ECC unit which works as a coprocessor to implement asymmetric cryptographic algorithms. Moreover, the instruction set extensions(ISE) of MIPS for these security functions are developed. Therefore, our security processor is not only able to handle high-intensity encryption tasks, but also compatible to the leading software development tools of industry. At last, its functionality and high performance are verified by our experimental chip.

Shuai Wang Yang Li Junbao Liu Jun Han Xiaoyang Zeng

State-Key Lab of ASIC and System, Fudan University, Shanghai 200433, China

国际会议

2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

厦门

英文

813-816

2011-10-25(万方平台首次上网日期,不代表论文的发表时间)