会议专题

A permutation network for configurable and scalable FF processors

In this paper we propose a permutation network a key component for configurable and scalable FF processors to perform a set of permutations on streaming data, he method presented for constructing such permutation networks applies to permutations that can be represented as linear mappings on the bit representation of data location. he permutation network consisting of se eral independent RA blocks and two interconnection networks is capable of operating in a pipelined way. o reduce the hardware comple ity of permutation network significantly a streaming architecture is adopted. Simulation is performed to erify the correctness of permutation network and implementation results are gi en.

iterati e Cooley- ukey FF permutation network streaming architecture

Shuai Chen Jialin Chen Kanwen Wang Wei Cao Lingli Wang

State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China

国际会议

2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

厦门

英文

857-860

2011-10-25(万方平台首次上网日期,不代表论文的发表时间)