New power rail ESD clamp design with current starving technology

摘要：

A new technique, introducing current starving into power rail ESD design, is presented and verified in this paper. To achieve the turn-on time requirement of the power rail ESD clamp circuit in a certain time, a smaller capacitor value will be permitted by which the current starving is used. Besides, PMOS keeper architecture is adopted in order to achieve low power leakage. Eventually, combining current starving technique with the PMOS keeper, the capacitor value is reduced by about one in ten.

关键词： Current starving PMOS keeper capacitor-small low-leakage ESD

作者: Bo Li Liji Wu Xiangmin Zhang

作者单位: Institute of Microelectronics, Tsinghua University, Beijing 100084, China

会议类型: 国际会议

会议名称: 2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

会议地点: 厦门

会议语种:英文

页码: 1034-1037

在线出版日期: 2011-10-25（万方平台首次上网日期，不代表论文的发表时间）