VLSI Design and Implementation of Density-based Spike Classification for Neuroprosthetic Applications
Successful proof-of-concept laboratory experiments on cortically-controlled brain computer interface motivate continued development for neural prosthetic microsystems (NPMs). In order to improve the NPMs, one of the main issue is to realize the realtime spike sorting processors (SSPs). The SSP detects the spikes, extracts the features, and then performs the classification algorithm to differentiate the spikes for different firing neurons. Several architectures have been designed for the spike detection and feature extraction. However, the hardware for classification is missing. To complete the SSP, a densitybased hardware-oriented clustering algorithm is adapted for the hardware implementation for the classification. In the hardware architecture level, the concepts of convolution and data reuse are adapted to further reduce the power consumption. The final implementation achieves 32.6 μW and 0.25 mm2 in 90nm lowleakage process.
Li-Fang CHENG Tung-Chien CHEN Liang-Gee CHEN
National Taiwan University, Taipei
国际会议
2011亚太信号与信息处理协会年度峰会(APSIPAASC 2011)
西安
英文
1-5
2011-10-18（万方平台首次上网日期，不代表论文的发表时间）