Design of Decimation Filter for Real-time Signal Processing of Micro-Air-Vehicles
This paper reports a digital decimation filter chip for real-time signal processing of micro-air-vehicles (MAVs), which is composed of cascade integrator comb (CIC) filter, half-band filter and CIC compensation filter. To obtain low power, low hardware cost and efficient area, optimization was performed at behavioral level modeling and register transfer level (RTL) design. A mathematical framework was presented to perform parameters optimization of different filters. The layout was designed based on SMIC 0.18 u m process library. The verification results show that the chip achieves a signal to noise ratio (SNR) of 54.40dB. The chip area occupies 1.69mm2 and dissipates only 2.95mW power. Area and power are well satisfied with the separation point detection of MAVs boundary layer.
decimation filter real-time signal processing low power low hardware cost separation point detection
Ying-tao Ding Shun-an Zhong Jing Chen
School of Information and Electronics Beijing Institute of Technology Beijing, China
国际会议
2011 4th International Congress on Image and Signal Processing(第四届图像与信号处理国际学术会议 CISP 2011)
上海
英文
2281-2284
2011-10-15（万方平台首次上网日期，不代表论文的发表时间）