Implementation of High Order Matched Filter on a FPGA Chip
The paper reviews derivation of matched filter. Particular attention has been paid to design and implementation of matched filter. In the paper a receiver system with matched filter for a deterministic signal is constructed and simulated in matlab/simulink. The distributed arithmetic (DA) based high-order matched filter on field programmable gate array (FPGA) device is implemented.
Matched filter Simulation implementation FPGA distributed arithmetic
YankaiXU Kai SHUANG
College of Geophysics and Information Engineering China University of Petroleum (Beijing) Beijing, China
国际会议
2011 4th International Congress on Image and Signal Processing(第四届图像与信号处理国际学术会议 CISP 2011)
上海
英文
2553-2557
2011-10-15(万方平台首次上网日期,不代表论文的发表时间)