A 12-bit Fully Differential SAR ADC with Dynamic Latch Comparator for Portable Physiological Monitoring Applications

摘要：

A 12-bit low-power successive approximation register analog-to-digital converter (SAR ADC) is presented using dynamic latch comparator to realize power consumption of 47.86μW under 1.8V supply voltage. Fully differential structure and hybrid 9-bit charge-redistribution capacitive and 3-bit resistor string DAC techniques are adopted to achieve balance between high precision and small area. Fabricated in SMIC 0.18-μm 1P6M mixed-signal CMOS technology, the ADC only occupies 0.39mm2 active area and the DNL/INL achieve 0.6LSB and 0.8LSB respectively.

作者: Li Yu Jingyong Zhang Lei Wang Jianguo Lu

作者单位: Institute of Biomedical Engineering and Health Technology Shenzhen Institute of Advanced Technology Shenzhen Chipsea Technologies CO., LTD Shenzhen, P. R. China

会议类型: 国际会议

会议名称: 2011 4th International Conference on Biomedical Engineering and Informatics(第四届生物医学工程与信息学国际会议 BMEI 2011)

会议地点: 上海

会议语种:英文

页码: 574-577

在线出版日期: 2011-10-15（万方平台首次上网日期，不代表论文的发表时间）