Microelectronics Neural Bridge IC with Voltage Stimulation*

摘要：

A microelectronics neural bridge IC with voltage stimulation designed in CSMC 0.5^m CMOS process is presented. This IC is expected to be used for bridging animals spinal nerves or peripheral nerves. It is composed of a neural electrical signal detecting circuit, a signal amplifying circuit, a DC offset compensating circuit and a functional electrical stimulation (FES) circuit. Two high performance op-amps are designed in the microelectronics neural bridge IC: a low noise op-amp and a constant-transconductance (constant-gm) railto-rail input/output op-amp. According to the neural signal spectrum, the bandwidth of the IC is designed from 400 Hz to 4 kHz. The chip area is 1050um×850μm. The power consumption is 914μA when the supply voltage is ± 2.5V.

关键词： neural signal CMOS op-amp rail-to-rail constant-gm

作者: Li Wenyuan Pei Fei

作者单位: Institute of RF- & OE-ICs, Southeast University, Nanjing, P. R. China

会议类型: 国际会议

会议名称: 2011 4th International Conference on Biomedical Engineering and Informatics(第四届生物医学工程与信息学国际会议 BMEI 2011)

会议地点: 上海

会议语种:英文

页码: 1145-1149

在线出版日期: 2011-10-15（万方平台首次上网日期，不代表论文的发表时间）