Communication-Aware Task Scheduling for Multi-Core Architectures with Segmented Buses
As the number of cores on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance, and energy consumption of the overall system. This paper presents a mesh-like connected multi-core architecture with segmented buses to meet the requirements of high performance and low energy consumption. Based on the proposed architecture, a communication-aware greedy task scheduling is designed to minimize the communication energy consumption among cores while maintaining the same performance as other scheduling algorithms. We evaluate the algorithm performance through a series of experiments with Gaussian Elimination, and the experimental results confirm the effectiveness of the algorithm.
Multi-Core Architecture Segmented Buses Gommunication Energy Consumption Greedy Algorithm Gaussian Elimination
Yuping Zhang Xianbin Xu Yuanhua Yang Shuibing He Zimian Hao
School of Computer Wuhan University Wuhan,China School of Computer Wuhan University Jianghan Art Vocational College Hubei Urban Construction Vocational and Technical College Wuhan,China
国际会议
上海
英文
2117-2121
2011-10-15（万方平台首次上网日期，不代表论文的发表时间）