IMPLEMENTATION OF EFFECTIVE MATRIX MULTIPLICATION ON FPGA

摘要：

Matrix Multiplication is a basic operation that can be used in many applications of DSP. For raw matrix data cannot feed into Simulink Xilinx block directly, thus a new module needs to be designed to complete the matrix multiplication. The original method is straightforward, while consuming considerable hardware resources. In order to save the consumption, we propose a new method to design the matrix multiplication module on Simulink Xilinx platform, which is also implemented on Spartan 3E FPGA (Field Programmable Gate Array). The main idea of the proposal is to reuse the resource and input the data in serial. In this way, the hardware cost can be dramatically decreased; meanwhile decreased but more time for the computation will be needed.

关键词： Matrix Multiplication FPGA Hardware Resource

作者: Xiaoxiao Jiang Jun Tao

作者单位: Department of Electrical Engineering, University of Minnesota,Twin Cities, USA Department of Computer Science, University of Minnesota Twin Cities, USA

会议类型: 国际会议

会议名称: 2011 4th IEEE International Conference on Broadband Network & Multimedia Technology(第四届IEEE宽带网络与多媒体国际会议 4th IEEE IC-BNMT2011)

会议地点: 深圳

会议语种:英文

页码: 656-658

在线出版日期: 2011-10-28（万方平台首次上网日期，不代表论文的发表时间）