Design and Research of Digital Decimation Filter Based on FPGA
This paper studies and analyses various digital filter and decimation structure. On this basis, by using QUARTUS development system design the decimation device modules, through the waveform simulation validated its correctness. Finally,a program is written into FPGA chip by the hardware platform, hi the digital down conversion (DDC), CIC (cascade integral comb) filter plays an important role. It is mainly used for sampling rate, as well as low-pass filter effect. The main characteristics of CIC filter, using only adders, subtractor and register (no multiplier), so fewer resources occupied, implementation is simple and high speed. Based on the analysis of the principle of CIC filter,simulate and synthesize based on the theory of using VHDL language in FPGA. And successful application in the development of DDC chip.
CIC(cascade integral comb) filter FPGA VHDL
YaoLi
Chaoyang District, Changchun City, Jilin University Testing Center
国际会议
上海
英文
2086-2091
2011-10-21（万方平台首次上网日期，不代表论文的发表时间）