DESIGN AND IMPLEMENTATION OF IEEE 802.16 BASEBAND SYSTEM ON FPGA
In this paper, a physical-layer baseband modem is discussed based on IEEE 802.16 protocol. It is implemented on Xilinx FPGA and tested correctly in loop-mode. After channel coding, a bit stream goes through constellation mapper, pilot inserting, OFDM(Orthogonal Frequency Division Multiplexing) modulation, PAPR(Peak to Average Power Ratio) reduction and framing module to become 7 symbols in IQ parallel form prepared for RF(Radio Frequency) front end. On condition of loop-mode, these symbols become back to serial bit stream via synchronization, channel estimation, OFDM demodulation, pilot removing and constellation demapper in receiver part. In practice, the entire loop-mode system takes about 120us when clock rate is 40Mhz. As a consequence, the baseband system delay is much lower in order to satisfy the demands for high rate data processing in broadband communication.
OFDM Baseband System FPGA IEEE 802.16
Chen Gu Xu Li
State Key Laboratory of Rail Traffic Control and Safety,Beijing Jiaotong University, Beijing 100044, State Key Laboratory of Rail Traffic Control and Safety, Beijing Jiaotong University, Beijing 100044
国际会议
北京
英文
1-5
2011-10-14(万方平台首次上网日期,不代表论文的发表时间)