A flexible real-time SAR processing platform for high resolution airborne image generation

摘要：

A compact RISC/FPGA based hardware architecture for high resolution SAR signal processing is presented. Sensor data rates above 300 Mbit/s and image dimensions of 8k x 4k pixels are processed in real-time. A maximum power consumption of less than 16 W enables for usage on small UAVs.

关键词： Real-time SAR FPGA hardware architecture

作者: Martin Pfitzner Stefan Langemeyer Peter Pirsch Holger Blume

作者单位: Institute of Microelectronic Systems, Leibniz University Hannover, Germany Appelstrasse 4, 30167 Hannover

会议类型: 国际会议

会议名称: 2011 IEEE CIE International Conference on Radar(2011年IEEE国际雷达会议RADAR 2011)

会议地点: 成都

会议语种:英文

页码: 26-29

在线出版日期: 2011-10-24（万方平台首次上网日期，不代表论文的发表时间）