A ROM-Less Direct Digital Frequency Synthesizer Based on a Scaling-free CORDIC algorithm

摘要：

A ROM-less direct digital frequency synthesizer (DOFS) based on the modified scaling-free COROIC algorithm is presented. Compared to the DDFS used conventional CORDIC, this algorithm reduces a half of iteration by using modified scaling-free COROIC on average. The corresponding design procedure with error, performance and hardware analysis has been given that leads to an optimized solution. The algorithm and its applications are implemented on FPGA (field programmable gate array) by using Verilog codes. The worse case spurious-free dynamic range (SFDR) is better than 80.5 dBc.

关键词： DDFS scaling-free CORDIC algorithm SFDR FPGA.

作者: Yi-Jiang Cao Yang Wang Tze-Yun Sung

作者单位: School of Applied Sciences,Harbin University of Science and Technology,Harbin China Department of Microelectronics Engineering,Chung Hua University,Hsinchu City,Taiwan

会议类型: 国际会议

会议名称: The 6th International Forum on Strategic Technology(IFOST 2011)(第六届国际战略技术论坛)

会议地点: 哈尔滨

会议语种:英文

页码: 1186-1189

在线出版日期: 2011-08-22（万方平台首次上网日期，不代表论文的发表时间）