Efficient encoding and decoding algorithm used in Reed-Solomon codes for multiple fault-tolerance memories
With the increasing density of transistor and the probability of MBUs (Multiple Bits Upsets), Hamming code is not enough to provide required reliability in memories. Therefore multiple error correc- tion codes are necessity. In this paper, Reed-Solomon (RS) codes are proposed to protect memories against MBUs which can achieve higher error correction capability (e.g. 8 bits). Besides a novel and low overhead multiplication algorithm is proposed and used in RS codes encoding and decoding process. At last, the encoder and decoder are implemented using Verilog HDL and validated through a number of simulations. The experiment results show that compared with other ECCs, RS code has higher error correction capability and lower area overhead.
component Reed-Solomon codes multipli-cation multiple bits upsets memories
Liyi Xiao Zheng Sun Ming Zhu
Microelectronics Center, Harbin Institute of Technology, Harbin, China
国际会议
哈尔滨
英文
1569-1572
2011-07-26（万方平台首次上网日期，不代表论文的发表时间）