A 0.1-2 GHz CMOS RF Front-end for Software-Defined Radio Applications
In this paper, A Software-Defined Radio (SDR) RF front-end is presented that contains LNA, mixers, VGAs, and frequency synthesizer, supporting various wireless communication standards in 0.1-2 GHz while guaranteeing a power/performance trade-off at any time. The circuit is fabricated in a 0.18 urn RF CMOS technology with 1.8 V supply voltage. Simulated result shows that the receive path achieves a Noise Figure of 3.8 dB at 160 MHz and 5.5 dB at 2 GHz. The Output-referred 3rd-order Intercept Point (OIP3) is high up to 21.3 dBm at 800 MHz. The voltage gain of the front-end is between 16-44 dB. The phase mismatch of LO quadrature signals is lower than 3°. It consumes 78.8 mW at the 1.8V supply.
SDR LNA Mixer VGA
Xuemei Lei Zhigong Wang Keping Wang
School of Electronics and Information Engineering,Inner Mongolia University Daxuexilu,Hohhot,China I Institute of RF- & OE-ICs,Southeast University,Nanjing,China Division of Circuits & Systems,EEE Nanyang Technological University Singapore
国际会议
上海
英文
275-278
2011-03-11(万方平台首次上网日期,不代表论文的发表时间)