An Integrated Differential 60 GHz Sliding-IF Receiver in SiGe BiCMOS
This paper presents an integrated 60 GHz slidingIF receiver fabricated in a 0.25 um SiGe BiCMOS technology. The receiver chain consists of a frontend and an IF IQ demodulator centered at around 12 GHz. A 48 GHz PLL is used to generate the front-end LO signal and the IF quadrature LO signals. The measured LISA noise figure is around 6.6 dB. Digital words are used to control the VGA gains and IQ mismatches through a Serial Peripheral Interface (SPI) to reduce the number of bond pads. The receiver chip has been mounted onto an application board, where an on-board Vivaldi antenna has already been fabricated. An overall conversion gain of 81 dB has been measured with tuning range larger than 30 dB. In a real in-door environment, error-free transmission with a data-rate of 3.6 Gbit/s has been observed over 15 meters.
60 GHz transceiver 60 GHz receiver SiGe BiCMOS mittmetter wave circuits chip-on-board sliding-IF bond wire compensation
Yaoming Sun Klaus Schmalz Srdjan Glisic Ruoyu Wang Christoph J. Scheytt
Circuit Design Department IHP Frankfurt Oder,Germany
国际会议
上海
英文
297-300
2011-03-11（万方平台首次上网日期，不代表论文的发表时间）