Private Cache Partitioning: A Method to Reduce the Off-chip Missrate Of Concurrently Executing Applications In Chip-Multiprocessors

摘要：

When there are several application running on Chip-Multiprocessors (CMPs), it is a problem to allocate the on-chip cache capacities between these competing applications. Cache partitioning is commonly used to solve this problem. Existing cache partitioning schemes either dedicate to the shared design or partition the last level cache depending on limited memory information. This paper presents Private Cache Partitioning, a low-overhead, runtime mechanism that partitions all of the private low level caches which are organized as a large shared cache by a distributed directory. The experiment results show that PCP reduces the overall missrate of competing applications and improves the throughput as well as the weighted speedup.

关键词： Chip-Multiprocessor private cache DCE private cache partitioning

作者: Li Hao Liu Tao Liu Guanghui Xie Lunguo

作者单位: Department of Computer Science National University of Defense Technology Changsha,China

会议类型: 国际会议

会议名称: 2011 3rd IEEE International Conference on Computer Research and Development(ICCRD 2011)(2011第三届计算机研究与发展国际会议)

会议地点: 上海

会议语种:英文

页码: 254-259

在线出版日期: 2011-03-11（万方平台首次上网日期，不代表论文的发表时间）