Development of SHT11 Customized IP Core Based on Avalon Bus

摘要：

This article briefly describes the SOPC and Avalon bus.In this paper, the development process of the SHT11 customized IP core is introduced in detail.This IP core adopts the nested state machine according to the device controller specification and the timing request, then an embedded system on the chip system based on NIOS II is built.CPU reads and writes SHT11 through the IP core.The customized IP core can shorten the development cycle and reduce the work when other users use SHT11 in the development

关键词： SOPC FPGA IP SHT11 MOS II

作者: Hui-Jing Sui Yong-Jie Yang

作者单位: School of Electronics and Communication,Nantong University Nantong Jiangsu ,Province.P.R.China Country

会议类型: 国际会议

会议名称: 2011 3rd International Conference on Computer and Network Technology(ICCNT 2011)(2011第三届IEEE计算机与网络技术国际会议)

会议地点: 太原

会议语种:英文

页码: 215-217

在线出版日期: 2011-02-26（万方平台首次上网日期，不代表论文的发表时间）