Study on the Stability of Digital Phase Locked Loop and its Applications
This paper deals with the design and application of high stability digital phase locked loop (DPLL) for uninterruptible power system (UPS) inverters. In this sense, the controller is designed by using PI control loop, which calculates the output active and reactive powers and adjusts the output frequency and phase. Software programs for digital signal processor (DSP) based on the DPLL are presented for experiment. And both the simulation and the experiment are presented to show the effectiveness and stability of the used control.
UPS inverter DPLL DSP
Lincai Li Yanfeng Chen
School of Electronic and Information Engineering,South China University of Technology Guangzhou, Chi School of Electronic and Information Engineering, South China University of Technology Guangzhou, Ch
国际会议
太原
英文
481-485
2011-02-26（万方平台首次上网日期，不代表论文的发表时间）