Decreasing Cache Contention Between Cooperative Threads in Multi-core Architectures Using a Heuristic-Based Scheduling Mechanism
Multi-core architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance. Well scheduling of running threads on these processors will result in achieving higher performance. Modern multi-core systems are designed to allow clusters of cores to share various hardware structures, such as last-level caches, memory controllers, and interconnections, as well as prefetching hardware. Without considering these shared resources, scheduling the threads will cause serious degradation in overall performance of the system. In this paper we propose a novel algorithm to schedule the threads that considers these potential contentions to keep away from. Another two important parameters in these environments are priority of each thread and communication rate between threads. A heuristic is introduced to apply these three parameters in selecting sets of threads for running on the processor.The simulation results showed that the proposed scheduler would avoid from lots of contentions between threads on various resources especially on shared caches.
component multi-core architecture, resource contention, shared cache, thread scheduling
S.Kazem Shekofteh Maryam Baradaran -K Hossein Deldari Mahmoud Naghibzadeh
Department of Computer Engineering. Ferdowsi University of Mashhad, Mashhad. Iran Department of Computer Engineering, Shandiz Institute of Higher Education, Mashhad, Iran
国际会议
太原
英文
96-100
2011-02-26（万方平台首次上网日期，不代表论文的发表时间）