Simulation and Design of DDS Based on Verilog HDL

摘要：

The method and steps of realization of DDS (Direct Digital Synthesizer) on Quartus II is described in detail. This paper analyzes the principle of DDS, builds up a system model, realizes DDS module based on Verilog HDL and simulates it. The IP nucleus of DDS which is built can be refrained. It is very easy to achieve frequency modulation, phase modulation and amplitude modulation with the DDS module. It has more comprehensive and nice practicality.

关键词： Quartus II DDS FPGA Verilog HDL IP nucleus

作者: Chunyan Wang

作者单位: Department of Electrical and Information Engineering Zhengzhou Institute of Aeronautical Industry Management Zhengzhou Henan, China

会议类型: 国际会议

会议名称: 2011 3rd International Conference on Computer and Network Technology(ICCNT 2011)(2011第三届IEEE计算机与网络技术国际会议)

会议地点: 太原

会议语种:英文

页码: 410-412

在线出版日期: 2011-02-26（万方平台首次上网日期，不代表论文的发表时间）