FPGA Implementation of Real-time Ethernet Communication Using RMII Interface

摘要：

FPGA-based solutions have become more common in embedded systems these days. These systems need to communicate with external world. Considering highspeed and popularity of Ethernet communication, a reliable real-time Ethernet component inside FPGA is of special value. To that end, this paper presents a new solution for 100 Mb/s FPGA-based Ethernet communications with timing analysis. The solution deals with Reduced Media-Independent Interface in its physical layer. UDP is the network protocol which is implemented from physical to transport layer. For getting used in real-time applications, timing analysis is done in the communication system. Component based software engineering is used in the design and development processes. In order to test the components inside FPGA, two different approaches are utilized. Signal measurement in combination with introduced windows based application contributes much in testing and validation phases.

关键词： FPGA Ethernet RMII 100 Mb/s Real-Time

作者: Nima Moghaddami Khalilzad Farahnaz Yekeh Lars Asplund Mostafa Pordel

作者单位: School of Innovation, Design, and Engineering Malardalen University Vasteras. Sweden Department of Computer Science Umea University Umea, Sweden

会议类型: 国际会议

会议名称: 2011 International Conference on Information and Computer Networks(ICICN 2011)(2011年信息与计算机网络国际会议)

会议地点: 贵阳

会议语种:英文

页码: 35-39

在线出版日期: 2011-01-26（万方平台首次上网日期，不代表论文的发表时间）