会议专题

Using FOM Predicting Method for Scheduling on Chip Multi-Processor

On a Chip Multi-Processor (CMP) architecture, cache sharing impacts threads non-uniformly, where some threads may be slowed down significantly, while others are not. This may cause severe performance problems such as throughput decreasing, cachc thrashing. This paper proposes a new predicting inter-thread cache contention model, FOM (Frequency of Miss), and schedules threads based on the results of FOM on the CMP architecture. The input to our model is the L2 cache misses number of each thread. The output of the model is the extra L2 cache misses for each thread due to cache sharing. We use the output of the model to guide scheduling. We use the multi2sim simulator to compare the throughput of FOA (Frequency of Access) with our FOM, and find our method improving performance up to 13%.

CMP FOM FOA scheduling throughput L2 cache

Gangyong Jia Wei Sheng Wenbo Dai Xi Li

Department of Computer Science and Technology, University of Science and Technology of China (USTC) Department of Computer Science and Technology, University of Science and Technology of China (USTC)

国际会议

2011 International Conference on System Modeling and Optimization(ICSMO 2011)(2011年系统建模与优化国际会议)

贵阳

英文

14-19

2011-01-26(万方平台首次上网日期,不代表论文的发表时间)