Electrical Simulation and Measurement of IPD with Multilayer Thin Film Technology for WLP
This work focuses on the development of Integrated Passive Devices (IPD) from electrical design, modeling and simulation till final fabrication and device technology qualification stage. Passivation layer of Polyimide (PI) type was used as inter-metal dielectric materials together with semi-additive copper plated redistribution layer (RDL) as conductive material that carries signal traces through the devices. It also applies multilayer thin film technology used in Wafer-level Packaging (WLP) processes. The thin film setup was designed at 6-layers, which comprises three Polyimide layers and three RDL. Passive devices are designed for Radio Frequency Integrated Circuit (RFIC) applications that work mainly at frequencies of 2.4GHz and 5GHz. For IPD, inductors cover the range of 1nH and 23nH, and capacitors are within range of 0.03pF to 2.5pF. Several coplanar waveguide (CPW) transmission line structures were also included in the test vehicle prototype to characterize the copper RDL quality in transmitting high-frequency signals at Gigahertz range. Substrate material of low resistivity silicon wafers at 25 Ohm.cm was used for these structures which influences the quality factor of coils and capacitors. Integrated inductors and capacitors structures with stack-up of passivation and copper RDL were designed at realistic Waferlevel thin film thickness, which allows robust integration into WLP platform. Structures correlation of high-frequency measurements and simulation showed maximum of 5% deviation at high-frequency bandwidth. Fabricated structures perform well in time-zero failure analysis and reliability test of High Temperature Storage (HTS 500hr).
Glen Siew Serine Soh Tong Yan Tee Haoyang Chen In Soo Kang Jong Heon Kim
R&D Team Nepes Pte Ltd 12, Ang Mo Kio Street 65, Singapore 569060
国际会议
上海
英文
658-663
2011-08-08（万方平台首次上网日期，不代表论文的发表时间）