40Gbit/s interface conversion circuit for 40GbE, STM-256/OC-768 and OTU3 serial signal transport
We develop 40Gbit/s interface conversion prototype circuits for 40GbE, STM-256/OC-768 and OTU3 tri-rate serial signal transport with 65nm CMOS technology. A conversion function between the SFI-5.1 and the SFI-5.2/XLAUI is demonstrated for the first time. The 16:4 MUX and 4:16 DEMUX prototype chips consume 1.6 and 1.7 W, respectively.
Shigeki Aisawa Masahito Tomizawa
NTT Network Innovation Labs Photonics Electronics Technology Research Association Hikari-no-oka 1-1 Yokosuka, Kanagawa, 239-0847 Japan
国际会议
Asia Communications and Photonics Conference and Exhibition(2010亚洲光纤通信与光弹博览会及研讨会 ACP 2010)
上海
英文
393-394
2010-12-08(万方平台首次上网日期,不代表论文的发表时间)