An Efficient CMOS DC Offset Cancellation Circuit for PGA of Low IF Wireless Receivers

摘要：

In this paper, the sources of DC offset in the front-ends of wireless systems are discussed and corresponding DC offset cancellation techniques are analyzed. Upon the discussion, a DC negative feedback technique based DC offset canceller, which is concise and easy to be integrated on chip, is elaborated in details by SMIC 0.18μm CMOS process. DC offset detector is an integral part of DC offset canceller. In this paper, an on chip DC offset detection circuit is proposed for the DC negative feedback canceller which can be used in the CMOS programmable gain amplifier (PGA) of a low intermediate frequency (IF) receiver as which in IEEE802.15.4/ZigBee wireless sensor network. Post-simulation and chip measurement results show that the DC offset canceller performs well.

作者: Fan Xiangning Sun Yutao Feng Yangyang

作者单位: Institute of RF-& OE-ICs, School of Information Science and Engineering Southeast University Nanjing 210096, China

会议类型: 国际会议

会议名称: 2010年无线通信与信号处理国际会议

会议地点: 上海

会议语种:英文

页码: 1-5

在线出版日期: 2010-10-20（万方平台首次上网日期，不代表论文的发表时间）