A 4GHz Low Power Glitch-Free Phase-Switching Divide-by-15/16 Prescaler in 0.18-μm CMOS

摘要：

This paper presents a low power glitch-free dualmodulus (15/16) prescaler based on the phase-switching for Ultra-Wide Band (UWB) transceiver. An inherently glitch-free phaseswitching prescaler is realized by the adoption of a reverse switching sequence without any additional complicated circuit. A simplified model of the source coupled logic (SCL) structure is proposed to optimize the power of the divide-by-2 divider. Followed by the first divide-by-2 stage, a synchronous divide-by-4 stage is used to generate eight 45°-spaced signal , which further decreases the operating frequency and the phase sequence is determined. Fabricated with SMIC 0.18μm CMOS technology, the proposed prescaler can operate from 2.8GHz to 5.8GHz while consuming 6.5mA (including test buffers) from a 1.8V voltage. The core area is 0.33mm×0.33mm.

作者: Wei Lv Lu Huang Xuefei Bai

作者单位: Department of Electronic Science and Technology,University of Science and Technology of China, Hefei 230027, P.R.China

会议类型: 国际会议

会议名称: 2010国际超宽带会议(ICUWB 2010)

会议地点: 南京

会议语种:英文

页码: 1-4

在线出版日期: 2010-09-20（万方平台首次上网日期，不代表论文的发表时间）