System Structure Template based Transaction Level Modeling

摘要：

In the field of SoC hardware/software co-design and electric system level design, architecture modeling is the basis of SoC high level mapping. This paper considers a novel transaction level modeling approach for various SoC architectures and design purpose. A system structure template based transaction level modeling approach is proposed to support template-level design reuse. The approach builds some typical system structure templates such as system function template (SFT) and architecture template(AT), which can customize architectures according to specific application purpose. Experiments results from JPEG encoder applications show that the SST approach can improve the quality and efficiency of SoC design greatly.

关键词： System-on-Chips Electric System Level Design Transaction Level modeling Architecture Template

作者: Dawei Wang Yingde Ye Sikun Li

作者单位: China Aerodynamics Research &Development Center,Mianyang, China China Aerodynamics Research & DevelopmentCenter, Mianyang, China computer science and technology, NationalUniversity of Defense Technology, Changsha, China

会议类型: 国际会议

会议名称: 2011 China Control and Decision Conference(2011中国控制与决策会议 CCDC)

会议地点: 四川绵阳

会议语种:英文

页码: 566-570

在线出版日期: 2011-05-23（万方平台首次上网日期，不代表论文的发表时间）