A Design of 32-bit Embedded Microprocessor
A 32-bit embedded Microprocessor based on the instruction set of ARMv4T architecture is designed and implemented in this paper. It adopts five-stage pipeline,implements separate instruction and data caches, contains memory management unit, and supports coprocessor instruction. This paper proposes perfect solution for the problem of data correlation, control correlation and resource correlation emerged in the pipeline. We carry functional description for each module with Verilog HDL,and then validate its correctness through simulation and debugging. The working frequency is up to 51.3 MHz on FPGA implementation, meeting the request of highperformance embedded system.
Microprocessor ARMv4T architecture pipeline cache memory management unit
Haimin Chen Bin Zheng
Zhengzhou Information Engineering University Zheng Zhou, China
国际会议
南宁
英文
48-50
2010-10-13（万方平台首次上网日期，不代表论文的发表时间）