Electrical design of high density low cost package for a switch ASIC
A switch Application Specific Integrated Circuit (ASIC) chip implemented in six-substrate layers for low cost design which has more than 1000 pin-count. This paper deals with the electrical design of the high density package, including transmission characteristics of the key signal lines, crosstalk between signal lines, the coupling between neighboring power pins, DC IR drop and AC input impedance etc. The authors used different local grounding solutions to reduce the current density and the coupling between power pins. In this paper, wide copper traces/shapes on the substrate layers were used to achieve minimum DC resistance and suppress the crosstalk between layers. Both wide copper traces/shapes and smallest available surface mount technology (SMT) capacitors placed at the bottom of the substrate were used to minimize the input impedance of power supply networks. Electrical test, DFT test and functional test showed that the low cost package meets the design requirements.
Jun Li Liqiang Cao Shuhua Liu Jing Zhou Qidong Wang Daniel Guidotti Lixi Wan
Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China;Cheng Liao Institute of Electromagnetics, Southwest Jiaotong University, Chengdu Sichuan 610031, China;
国际会议
西安
英文
548-551
2010-08-16（万方平台首次上网日期，不代表论文的发表时间）